1. Field of the Invention
This invention relates to semiconductor packaging technology, and more particularly, to a semiconductor package structure with a heat-dissipation stiffener and a method of fabricating the same, which allow the finished package product to be more assured in quality and reliability.
2. Description of Related Art
In BGA (Ball Grid Array, BGA) technology, flip-chip bonding is an essential fabrication process including a first step of bonding the semiconductor chip over the substrate by means of solder balls; a second step of injecting a cleaning solvent into the gap between the chip and the substrate to wash away the remnant flux therein; a third step of performing an underfill process; a fourth step of performing ball-mounting process to mount solder balls on the back surface of the substrate; and a fifth step of performing a singulation process to cut apart the package body into separate package units.
One drawback to the forgoing process, however, is that, since the semiconductor chip is different in coefficient of thermal expansion (CTE) from the substrate, the entire package structure would be easily subjected to warpage after undergoing high-temperature conditions during die bonding, flip-chip underfill, and ball mounting processes, which would easily cause chip cracking, making the resulted package product degraded in quality and reliability. When flex or thin substrate is used as the base, the package warpage would be even more worse.
One solution to the foregoing problem is disclosed in U.S. Pat. No. 6,020,221, which teaches the use of a stiffener to help prevent package warpage, whose package structure is briefly described in the following with reference to FIGS. 1-2. As shown, the patented package structure 10 includes a substrate 14; a semiconductor chip 12 bonded to the substrate 14 by means of solder balls 30; a stiffener 20 having a centrally-hollowed portion 24 and adhered to the substrate 14 by means of an adhesive 46; an underfill layer 32 filled and cured in the gap between the semiconductor chip 12 and the substrate 14; and a plurality of solder balls implanted on the back surface of the substrate 14. When the stiffener 20 is mounted in position, the semiconductor chip 12 is accommodated within the centrally-hollowed portion 24 thereof, so that the stiffener 20 can be easily integrated to the package structure.
Due to the provision of the stiffener 20 which is highly rigid in material quality, the foregoing package structure would be less likely subjected to package warpage. One draw. back to the forgoing package structure, however, is that when a cleaning solvent is injected to the gap between the semiconductor chip 12 and the substrate 14 to clean away remnant solder flux, the cleaning solvent would be partly obstructed by the stiffener 20, making the cleaning process very difficult to carry out efficiently and thoroughly. When some solder flux is still left, it would cause the subsequently formed flip-chip underfill layer to have voids, which would considerably degrade the quality and reliability of the finished package product.
It is therefore an objective of this invention to provide a new semiconductor packaging technology that allows the cleaning solvent used to clean away remnant solder flux to be smoothly injected to the gap between the chip and the substrate, so as to allow subsequently formed flip-chip underfill layer to be substantially free of voids, so that the quality and reliability of the finished package product can be more assured.
In accordance with the foregoing and other objectives, the invention proposes a new semiconductor packaging technology. The package structure of the invention includes a substrate having a front surface and a back surface; a thermally-conductive stiffener mounted over the front surface of the substrate, the stiffener being formed with a centrally-hollowed portion and an outward-extending passage; a semiconductor chip mounted on the front surface of the substrate and within the centrally-hollowed portion of the stiffener; an underfill layer filled and cured in a gap between the semiconductor chip and the substrate; and a plurality of solder balls mounted on the back surface of the substrate. Alternatively, the passage can be formed in the front surface of the substrate. During fabrication process, the passage is used for the injection of a cleaning solvent into the gap between the semiconductor chip and the substrate so as to clean away remnant solder flux. The cleaning effect can be more enhanced by using, for example, centrifugal, rotating, or disturbing type of flow accelerating means to help increase the flow speed of the injected solvent.
The invention allows the cleaning solvent used in the solder flux cleaning process to be unobstructed by the stiffener so that the cleaning solvent can be more smoothly injected into the gap between the semiconductor chip and the substrate. This benefit allows the subsequently formed underfill layer to be substantially free of voids; and therefore, the finished package product is more assured in quality and reliability.